The present invention relates to an active matrix liquid crystal display device comprising a row and column array of liquid crystal display elements, each display element having an associated switching device, sets of row and column address conductors connected to the display elements via which selection signals and data signals, respectively, are applied to the display elements, a row drive circuit for applying selection signals to the set of row address conductors and a column drive circuit for applying data signals to the set of column address conductors, which column drive circuit is operable to transfer the data signals for the display elements of a row to groups of column address conductors in sequence, in respective group address periods, each group comprising a plurality of column address conductors.
Active matrix liquid crystal display devices, are well known, typical examples of such, and the general manner in which they operate, are described in U.S. Pat. No. 5,130,829. In these devices, display element electrodes are provided on a first substrate together with the switching devices, in the form of TFTs (thin film transistors), and sets of row and column address conductors. A second substrate carrying a transparent common electrode is arranged spaced from the first substrate and LC (liquid crystal) material is disposed between the two substrates. Each He display element electrode is connected to the drain electrode of its associated TFT. The gates of all of the TFTs in a row of display elements are connected to a respective row address conductor and the source electrodes of all the TFTs in a column of display elements are connected to a respective column address conductor. A row drive circuit connected to the set of row address conductors scans the row conductors by applying a selection (gating) signal to each row conductor in sequence to turn on the TFTs of a row of display elements, and a column drive circuit connected to the set of column conductors applies data signals to the column conductors in synchronism with the scanning of the row conductors by the row drive circuit, whereby the display elements of a selected row are charged via their respective TFTs to a level dependent on the value of the data signal on their associated column conductors to produce a required display output. The rows are driven individually in turn during respective row address periods in this manner so as to build up a display picture over one field period, and the array of display elements is repeatedly addressed in a similar manner in successive field periods.
For convenience of manufacture and compactness, the row and/or column drive circuits in some display devices, and especially those using polysilicon TFTs, have been integrated on the substrate carrying the TFTs peripherally of the display element array using the same large area electronics technology as that employed for the active matrix circuitry of the array with the circuitry of the drive circuits being fabricated simultaneously with this circuitry and similarly comprising TFTs, conductor lines, etc. Due to certain limitations in operational performance of the TFTs and the kinds of circuit possible when using TFTs, the column drive circuit is customarily provided in the form of a simple multiplexing circuit, examples of which are described in U.S. Pat. No. 4,890,101, the paper entitled xe2x80x9cFully Integrated Poly-Si TFT CMOS Drivers for Self-Scanned Light Valvexe2x80x9d by Y. Nishihara et al in SID 92 Digest, pages 609-612, and in the paper entitled xe2x80x9cA 1.8-in Poly-Si TFTxe2x80x94LCD for HDTV Projectors with a 5-V Fully Integrated Driverxe2x80x9d by S. Higashi et al in SID 95 Digest, pages 81 to 84. This type of column drive circuit operates in the manner described in the opening paragraph, the operation being based on a multiplexing technique in which analogue video information (data) is sequentially transferred via multiplexing switches from a plurality of video input lines, to which video information is applied simultaneously, to corresponding groups or blocks of column address conductors in the display with each column conductor in a group being connected via a multiplexer switch to a different video input line. Each column address conductor is connected to a respective output of the circuit and typically in these circuits, the operation is such that an output associated with one column conductor becomes high impedance prior to, or while, the data signal for an adjacent column conductor is applied. During a row address (video line) period the multiplexer circuit operates to charge each group of column conductors in turn until all the column conductors in the display device have been charged to a level corresponding to the level of the video information on the input lines. Once a group of column conductors has been charged the associated multiplexing switches open and the column conductors become high impedance nodes with the voltage applied being maintained on the column conductor capacitance, and then the next group is charged. The circuit operates in this manner so as to charge all the groups in sequence and to drive each row of display elements in turn in this way during respective row address periods.
Whilst the provision of an integrated, multiplexing type, column drive circuit has benefits with regard to the simplication of fabrication of the display device, it has been found that problems can occur in the display output from the display element array during operation of the device. Particularly, certain columns in the array may show errors by virtue of the display elements in these columns having incorrect drive levels which results for example in a lack of display uniformity when displaying uniform grey fields that manifests itself as highly visible vertical lines in the displayed image.
It is an object of the present invention to provide an active matrix display device of the kind using a column drive circuit which operates in the manner of a multiplexing circuit in which the problem of the aforementioned undesirable display output artefacts is overcome or reduced at least to some extent.
According to the present invention there is provided an active matrix liquid crystal display device of the kind described in the opening paragraph which is characterised in that the column drive circuit is arranged to apply during an address period for one group a pre-charging signal to the adjacent column address conductor of the next-addressed group according to the value of a data signal for a column address conductor in that one group. Such pre-charging of a column conductor in a group at the time the preceding group is being charged is intended to reduce the size of the voltage transition on that column conductor occurring when that column conductor is charged in the subsequent group address period. As a result of this pre-charging, it has been found that the extent of the unwanted display artefacts is considerably reduced.
The invention stems from an appreciation of the reason for these display artefacts when using a multiplexing type of column drive circuit. Capacitive couplings can occur between adjacent column address conductors, either directly or indirectly. Where each column conductor extends between facing edges or sides of an adjacent pair of display element electrodes in a row, capacitance coupling between an adjacent pair of column address conductors indirectly via the electrode can be significant. Direct capacitive coupling between two column conductors can occur in the case of an alternative lay-out in which pairs of column conductors are provided adjacent one another and columns of display element electrodes are provided to either side of the pair, one column of electrodes being addressed via one of column conductors and the other addressed via the second column conductor. The presence of such indirect or direct capacitance means that as the voltage on the first column conductor of one group is changed in operation of the column drive circuit, the change in voltage can be coupled onto the last column conductor of the previously addressed group through this capacitance, thereby disturbing the voltage set on that last column conductor. This results in errors occurring in the voltage on the last column conductor of each group (apart from the last) which errors cause the aforementioned visible vertical lines in the displayed image. The problem is particularly apparent in high aperture type display devices, in which the display element electrodes are carried on an insulating layer that extends over the active matrix circuitry, comprising the TFTs and sets of row and column address conductors, on the substrate and in which portions of the display element electrodes are arranged to overlap partially the two adjacent column address conductor (and row address conductors) so as to increase their effective apertures. Such overlap can result in significant capacitance existing between a column address conductor and the adjacent portions of the display element electrodes.
By pre-charging, in accordance with the invention, the column conductor causing this interference, the magnitude of the voltage transition occurring on that column conductor when subsequently addressed by the column drive circuit is reduced, thereby reducing the error caused on the adjacent column conductor in the priorxe2x80x94addressed group.
For the greatest benefit the column conductor is preferably pre-charged to a value close to its expected final voltage, as dependent on the value of the intended data signal for that column conductor, and the pre-charging is effected in a way such that the voltage transition and the induced error tends to zero for plain fields where the visible effects of the induced error are most significant.
In a preferred embodiment, the data signals are transferred from a plurality of video input lines via multiplexing switches whose outputs are each coupled to a respective column conductor, as in known multiplexing column drive circuits, and the said adjacent column conductor of the next-addressed group is connected to a video input line via a supplementary switch, in addition to its associated multiplexer switch. The supplementary switch is arranged to be operated at the same time as the multiplexer switches of the previously addressed group. The supplementary switch and the multiplexer switch associated with the column conductor preferably are connected to the same video input line. Thus, when that preceding group is selected, the first column conductor in the next group is charged through the supplementary switch to the potential level existing on its associated video line at that time. Thereafter, when the next group is selected the first column conductor of this group is again addressed, via its respective multiplexer switch, and charged to the potential which then exists on the video line, i.e. the intended data signal level. The voltage transition on this first column conductor in the subsequently addressed group then corresponds just to the difference in the potential on its associated video line between successive time periods in which the two groups are selected. In the case of a plain field display, the video line voltage remains constant so the difference will be zero. In some cases, for example when a column inversion drive scheme is employed, it may be desirable to connect the supplementary switch to a video input line different from that to which the multiplexing switch is connected.